Tài liệu PIC16F87XA Data Sheet ppt

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 2003 Microchip Technology Inc. DS39582B-page 3
PIC16F87XA
Pin Diagrams (Continued)
RB7/PGD
RB6/PGC
RB5
RB4
RB3/PGM
RB2
RB1
RB0/INT
V
DD
VSS
RD7/PSP7
RD6/PSP6
RD5/PSP5
RD4/PSP4
RC7/RX/DT
RC6/TX/CK
RC5/SDO
RC4/SDI/SDA
RD3/PSP3
RD2/PSP2
MCLR/VPP
RA0/AN0
RA1/AN1
RA2/AN2/V
REF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS
/C2OUT
RE0/RD
/AN5
RE1/WR
/AN6
RE2/CS
/AN7
V
DD
VSS
OSC1/CLKI
OSC2/CLKO
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RD0/PSP0
RD1/PSP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
PIC16F874A/877A
40-Pin PDIP
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
44
8
7
6
5
4
3
2
1
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
9
PIC16F874A
RA4/T0CKI/C1OUT
RA5/AN4/SS
/C2OUT
RE0/RD
/AN5
OSC1/CLKI
OSC2/CLKO
RC0/T1OSO/T1CK1
NC
RE1/WR
/AN6
RE2/CS
/AN7
V
DD
VSS
RB3/PGM
RB2
RB1
RB0/INT
V
DD
VSS
RD7/PSP7
RD6/PSP6
RD5/PSP5
RD4/PSP4
RA3/AN3/VREF+
RA2/AN2/V
REF-/CVREF
RA1/AN1
RA0/AN0
MCLR
/VPP
NC
RB7/PGD
RB6/PGC
RB5
RB4
NC
NC
RC6/TX/CK
RC5/SDO
RC4/SDI/SDA
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RC3/SCK/SCL
RC2/CCP1
RC1/T1OSI/CCP2
10
11
2
3
4
5
6
1
18
19
20
21
22
12
13
14
15
38
8
7
44
43
42
41
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
PIC16F874A
37
RA3/AN3/VREF+
RA2/AN2/V
REF-/CVREF
RA1/AN1
RA0/AN0
MCLR
/VPP
NC
RB7/PGD
RB6/PGC
RB5
RB4
NC
RC6/TX/CK
RC5/SDO
RC4/SDI/SDA
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RC3/SCK/SCL
RC2/CCP1
RC1/T1OSI/CCP2
NC
NC
RC0/T1OSO/T1CKI
OSC2/CLKO
OSC1/CLKI
V
SS
VDD
RE2/CS/AN7
RE1/WR
/AN6
RE0/RD
/AN5
RA5/AN4/SS
/C2OUT
RA4/T0CKI/C1OUT
RC7/RX/DT
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
V
SS
VDD
RB0/INT
RB1
RB2
RB3/PGM
44-Pin PLCC
44-Pin TQFP
PIC16F877A
PIC16F877A
RC7/RX/DT
PIC16F87XA
DS39582B-page 4  2003 Microchip Technology Inc.
Table of Contents
1.0 Device Overview 5
2.0 Memory Organization 15
3.0 Data EEPROM and Flash Program Memory 33
4.0 I/O Ports 41
5.0 Timer0 Module 53
6.0 Timer1 Module 57
7.0 Timer2 Module 61
8.0 Capture/Compare/PWM Modules 63
9.0 Master Synchronous Serial Port (MSSP) Module 71
10.0 Addressable Universal Synchronous Asynchronous Receiver Transmitter (USART) 111
11.0 Analog-to-Digital Converter (A/D) Module 127
12.0 Comparator Module 135
13.0 Comparator Voltage Reference Module 141
14.0 Special Features of the CPU 143
15.0 Instruction Set Summary 159
16.0 Development Support 167
17.0 Electrical Characteristics 173
18.0 DC and AC Characteristics Graphs and Tables 197
19.0 Packaging Information 209
Appendix A: Revision History 219
Appendix B: Device Differences 219
Appendix C: Conversion Considerations 220
Index 221
On-Line Support 229
Systems Information and Upgrade Hot Line 229
Reader Response 230
PIC16F87XA Product Identification System 231
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An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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 2003 Microchip Technology Inc. DS39582B-page 5
PIC16F87XA
1.0 DEVICE OVERVIEW
This document contains device specific information
about the following devices:
• PIC16F873A
• PIC16F874A
• PIC16F876A
• PIC16F877A
PIC16F873A/876A devices are available only in 28-pin
packages, while PIC16F874A/877A devices are avail-
able in 40-pin and 44-pin packages. All devices in the
PIC16F87XA family share common architecture with
the following differences:
• The PIC16F873A and PIC16F874A have one-half
of the total on-chip memory of the PIC16F876A
and PIC16F877A
• The 28-pin devices have three I/O ports, while the
40/44-pin devices have five
• The 28-pin devices have fourteen interrupts, while
the 40/44-pin devices have fifteen
• The 28-pin devices have five A/D input channels,
while the 40/44-pin devices have eight
• The Parallel Slave Port is implemented only on
the 40/44-pin devices
The available features are summarized in Table 1-1.
Block diagrams of the PIC16F873A/876A and
PIC16F874A/877A devices are provided in Figure 1-1
and Figure 1-2, respectively. The pinouts for these
device families are listed in Table 1-2 and Table 1-3.
Additional information may be found in the PICmicro
®
Mid-Range Reference Manual (DS33023), which may
be obtained from your local Microchip Sales Represen-
tative or downloaded from the Microchip web site. The
Reference Manual should be considered a complemen-
tary document to this data sheet and is highly recom-
mended reading for a better understanding of the device
architecture and operation of the peripheral modules.
TABLE 1-1: PIC16F87XA DEVICE FEATURES
Key Features PIC16F873A PIC16F874A PIC16F876A PIC16F877A
Operating Frequency DC – 20 MHz DC – 20 MHz DC – 20 MHz DC – 20 MHz
Resets (and Delays) POR, BOR
(PWRT, OST)
POR, BOR
(PWRT, OST)
POR, BOR
(PWRT, OST)
POR, BOR
(PWRT, OST)
Flash Program Memory
(14-bit words)
4K 4K 8K 8K
Data Memory (bytes) 192 192 368 368
EEPROM Data Memory (bytes) 128 128 256 256
Interrupts 14 15 14 15
I/O Ports Ports A, B, C Ports A, B, C, D, E Ports A, B, C Ports A, B, C, D, E
Timers 3333
Capture/Compare/PWM modules2222
Serial Communications MSSP, USART MSSP, USART MSSP, USART MSSP, USART
Parallel Communications — PSP — PSP
10-bit Analog-to-Digital Module 5 input channels 8 input channels 5 input channels 8 input channels
Analog Comparators 2222
Instruction Set 35 Instructions 35 Instructions 35 Instructions 35 Instructions
Packages 28-pin PDIP
28-pin SOIC
28-pin SSOP
28-pin QFN
40-pin PDIP
44-pin PLCC
44-pin TQFP
44-pin QFN
28-pin PDIP
28-pin SOIC
28-pin SSOP
28-pin QFN
40-pin PDIP
44-pin PLCC
44-pin TQFP
44-pin QFN
PIC16F87XA
DS39582B-page 6  2003 Microchip Technology Inc.
FIGURE 1-1: PIC16F873A/876A BLOCK DIAGRAM
Flash
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
RAM
File
Registers
Direct Addr
7
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR reg
Status reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKI
OSC2/CLKO
MCLR
VDD, VSS
PORTA
PORTB
PORTC
RA4/T0CKI/C1OUT
RA5/AN4/SS
/C2OUT
RB0/INT
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
8
8
Brown-out
Reset
Note 1: Higher order bits are from the Status register.
USART
CCP1,2
Synchronous
10-bit A/D
Timer0 Timer1
Timer2
Serial Port
RA3/AN3/VREF+
RA2/AN2/VREF-/CVREF
RA1/AN1
RA0/AN0
8
3
Data EEPROM
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
In-Circuit
Debugger
Low-Voltage
Programming
Comparator
Voltage
Reference
Device Program Flash Data Memory Data EEPROM
PIC16F873A 4K words 192 Bytes 128 Bytes
PIC16F876A 8K words 368 Bytes 256 Bytes
Program
Memory
 2003 Microchip Technology Inc. DS39582B-page 7
PIC16F87XA
FIGURE 1-2: PIC16F874A/877A BLOCK DIAGRAM
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
RAM
File
Registers
Direct Addr
7
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR reg
Status reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKI
OSC2/CLKO
MCLR
VDD, VSS
PORTA
PORTB
PORTC
PORTD
PORTE
RA4/T0CKI/C1OUT
RA5/AN4/SS
/C2OUT
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RE0/RD
/AN5
RE1/WR
/AN6
RE2/CS
/AN7
8
8
Brown-out
Reset
Note 1: Higher order bits are from the Status register.
RA3/AN3/VREF+
RA2/AN2/VREF-/CVREF
RA1/AN1
RA0/AN0
Parallel
8
3
RB0/INT
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
In-Circuit
Debugger
Low-Voltage
Programming
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
USART
CCP1,2
Synchronous
10-bit A/D
Timer0 Timer1
Timer2
Serial Port
Data EEPROM
Comparator
Voltage
Reference
Device Program Flash Data Memory Data EEPROM
PIC16F874A 4K words 192 Bytes 128 Bytes
PIC16F877A 8K words 368 Bytes 256 Bytes
Flash
Program
Memory
Slave Port
PIC16F87XA
DS39582B-page 8  2003 Microchip Technology Inc.
TABLE 1-2: PIC16F873A/876A PINOUT DESCRIPTION
Pin Name
PDIP, SOIC,
SSOP Pin#
QFN
Pin#
I/O/P
Type
Buffer
Type
Description
OSC1/CLKI
OSC1
CLKI
9
6
I
I
ST/CMOS
(3)
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input. ST
buffer when configured in RC mode; otherwise CMOS.
External clock source input. Always associated with pin
function OSC1 (see OSC1/CLKI, OSC2/CLKO pins).
OSC2/CLKO
OSC2
CLKO
10 7
O
O
— Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
MCLR
/VPP
MCLR
VPP
126
I
P
ST Master Clear (input) or programming voltage (output).
Master Clear (Reset) input. This pin is an active low Reset
to the device.
Programming voltage input.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
227
I/O
I
TTL
Digital I/O.
Analog input 0.
RA1/AN1
RA1
AN1
328
I/O
I
TTL
Digital I/O.
Analog input 1.
RA2/AN2/V
REF-/
CV
REF
RA2
AN2
V
REF-
CV
REF
41
I/O
I
I
O
TTL
Digital I/O.
Analog input 2.
A/D reference voltage (Low) input.
Comparator V
REF output.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
52
I/O
I
I
TTL
Digital I/O.
Analog input 3.
A/D reference voltage (High) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
63
I/O
I
O
ST
Digital I/O – Open-drain when configured as output.
Timer0 external clock input.
Comparator 1 output.
RA5/AN4/SS
/C2OUT
RA5
AN4
SS
C2OUT
74
I/O
I
I
O
TTL
Digital I/O.
Analog input 4.
SPI slave select input.
Comparator 2 output.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
 2003 Microchip Technology Inc. DS39582B-page 9
PIC16F87XA
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT
RB0
INT
21 18
I/O
I
TTL/ST
(1)
Digital I/O.
External interrupt.
RB1
22 19 I/O TTL
Digital I/O.
RB2
23 20 I/O TTL
Digital I/O.
RB3/PGM
RB3
PGM
24 21
I/O
I
TTL
Digital I/O.
Low-voltage (single-supply) ICSP programming enable pin.
RB4
25 22 I/O TTL
Digital I/O.
RB5
26 23 I/O TTL
Digital I/O.
RB6/PGC
RB6
PGC
27 24
I/O
I
TTL/ST
(2)
Digital I/O.
In-circuit debugger and ICSP programming clock.
RB7/PGD
RB7
PGD
28 25
I/O
I/O
TTL/ST
(2)
Digital I/O.
In-circuit debugger and ICSP programming data.
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI
RC0
T1OSO
T1CKI
11 8
I/O
O
I
ST
Digital I/O.
Timer1 oscillator output.
Timer1 external clock input.
RC1/T1OSI/CCP2
RC1
T1OSI
CCP2
12 9
I/O
I
I/O
ST
Digital I/O.
Timer1 oscillator input.
Capture2 input, Compare2 output, PWM2 output.
RC2/CCP1
RC2
CCP1
13 10
I/O
I/O
ST
Digital I/O.
Capture1 input, Compare1 output, PWM1 output.
RC3/SCK/SCL
RC3
SCK
SCL
14 11
I/O
I/O
I/O
ST
Digital I/O.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
2
C mode.
RC4/SDI/SDA
RC4
SDI
SDA
15 12
I/O
I
I/O
ST
Digital I/O.
SPI data in.
I
2
C data I/O.
RC5/SDO
RC5
SDO
16 13
I/O
O
ST
Digital I/O.
SPI data out.
RC6/TX/CK
RC6
TX
CK
17 14
I/O
O
I/O
ST
Digital I/O.
USART asynchronous transmit.
USART1 synchronous clock.
RC7/RX/DT
RC7
RX
DT
18 15
I/O
I
I/O
ST
Digital I/O.
USART asynchronous receive.
USART synchronous data.
V
SS 8, 19 5, 6 P — Ground reference for logic and I/O pins.
V
DD 20 17 P — Positive supply for logic and I/O pins.
TABLE 1-2: PIC16F873A/876A PINOUT DESCRIPTION (CONTINUED)
Pin Name
PDIP, SOIC,
SSOP Pin#
QFN
Pin#
I/O/P
Type
Buffer
Type
Description
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
PIC16F87XA
DS39582B-page 10  2003 Microchip Technology Inc.
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION
Pin Name
PDIP
Pin#
PLCC
Pin#
TQFP
Pin#
QFN
Pin#
I/O/P
Type
Buffer
Type
Description
OSC1/CLKI
OSC1
CLKI
13 14 30 32
I
I
ST/CMOS
(4)
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source
input. ST buffer when configured in RC mode;
otherwise CMOS.
External clock source input. Always associated
with pin function OSC1 (see OSC1/CLKI,
OSC2/CLKO pins).
OSC2/CLKO
OSC2
CLKO
14 15 31 33
O
O
— Oscillator crystal or clock output.
Oscillator crystal output.
Connects to crystal or resonator in Crystal
Oscillator mode.
In RC mode, OSC2 pin outputs CLKO, which
has 1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
MCLR
/VPP
MCLR
VPP
1 2 18 18
I
P
ST Master Clear (input) or programming voltage (output).
Master Clear (Reset) input. This pin is an active
low Reset to the device.
Programming voltage input.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
2 3 19 19
I/O
I
TTL
Digital I/O.
Analog input 0.
RA1/AN1
RA1
AN1
3 4 20 20
I/O
I
TTL
Digital I/O.
Analog input 1.
RA2/AN2/V
REF-/CVREF
RA2
AN2
V
REF-
CV
REF
4 5 21 21
I/O
I
I
O
TTL
Digital I/O.
Analog input 2.
A/D reference voltage (Low) input.
Comparator V
REF output.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
5 6 22 22
I/O
I
I
TTL
Digital I/O.
Analog input 3.
A/D reference voltage (High) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
6 7 23 23
I/O
I
O
ST
Digital I/O – Open-drain when configured as
output.
Timer0 external clock input.
Comparator 1 output.
RA5/AN4/SS
/C2OUT
RA5
AN4
SS
C2OUT
7 8 24 24
I/O
I
I
O
TTL
Digital I/O.
Analog input 4.
SPI slave select input.
Comparator 2 output.
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
 2003 Microchip Technology Inc. DS39582B-page 11
PIC16F87XA
PORTB is a bidirectional I/O port. PORTB can be
software programmed for internal weak pull-up on all
inputs.
RB0/INT
RB0
INT
33 36 8
9
I/O
I
TTL/ST
(1)
Digital I/O.
External interrupt.
RB1 34 37 9
10 I/O
TTL Digital I/O.
RB2 35 38 10
11 I/O
TTL Digital I/O.
RB3/PGM
RB3
PGM
36 39 11
12
I/O
I
TTL
Digital I/O.
Low-voltage ICSP programming enable pin.
RB4 37 41 14
14 I/O
TTL Digital I/O.
RB5 38 42 15
15 I/O
TTL Digital I/O.
RB6/PGC
RB6
PGC
39 43 16
16
I/O
I
TTL/ST
(2)
Digital I/O.
In-circuit debugger and ICSP programming clock.
RB7/PGD
RB7
PGD
40 44 17
17
I/O
I/O
TTL/ST
(2)
Digital I/O.
In-circuit debugger and ICSP programming data.
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED)
Pin Name
PDIP
Pin#
PLCC
Pin#
TQFP
Pin#
QFN
Pin#
I/O/P
Type
Buffer
Type
Description
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
PIC16F87XA
DS39582B-page 12  2003 Microchip Technology Inc.
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI
RC0
T1OSO
T1CKI
15 16 32 34
I/O
O
I
ST
Digital I/O.
Timer1 oscillator output.
Timer1 external clock input.
RC1/T1OSI/CCP2
RC1
T1OSI
CCP2
16 18 35 35
I/O
I
I/O
ST
Digital I/O.
Timer1 oscillator input.
Capture2 input, Compare2 output, PWM2 output.
RC2/CCP1
RC2
CCP1
17 19 36 36
I/O
I/O
ST
Digital I/O.
Capture1 input, Compare1 output, PWM1 output.
RC3/SCK/SCL
RC3
SCK
SCL
18 20 37 37
I/O
I/O
I/O
ST
Digital I/O.
Synchronous serial clock input/output for SPI
mode.
Synchronous serial clock input/output for I
2
C
mode.
RC4/SDI/SDA
RC4
SDI
SDA
23 25 42 42
I/O
I
I/O
ST
Digital I/O.
SPI data in.
I
2
C data I/O.
RC5/SDO
RC5
SDO
24 26 43 43
I/O
O
ST
Digital I/O.
SPI data out.
RC6/TX/CK
RC6
TX
CK
25 27 44 44
I/O
O
I/O
ST
Digital I/O.
USART asynchronous transmit.
USART1 synchronous clock.
RC7/RX/DT
RC7
RX
DT
26 29 1 1
I/O
I
I/O
ST
Digital I/O.
USART asynchronous receive.
USART synchronous data.
TABLE 1-3: PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED)
Pin Name
PDIP
Pin#
PLCC
Pin#
TQFP
Pin#
QFN
Pin#
I/O/P
Type
Buffer
Type
Description
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.